How to do a PCB netlist check?

What is a PCB netlist?

A printed circuit board (PCB) netlist is a text file that lists all of the components and nets (connections) on a PCB design. It provides a complete description of the electrical connectivity of the board. The netlist is an essential part of the PCB design process as it allows checking that all components are properly connected before the board is manufactured.

A typical netlist will include:
– A list of all components on the board, identified by their reference designator
– The pins of each component and what net they connect to
– Information about power and ground nets
– Details of any special nets like differential pairs

Here is a simple example of what a netlist looks like:

  R1   1  VCC
         2  OUT
  C1   1  GND
         2  OUT
  U1   VCC  VCC
         OUT OUT
         GND GND

This netlist describes a circuit with three components (R1, C1, U1) and three unique nets (VCC, GND, OUT). It specifies which component pins connect to each net.

Why is a netlist check important?

Catching connectivity errors

The primary purpose of a netlist check is to verify that the actual connections on the PCB layout match the intended connections from the schematic design. Any discrepancies could lead to a non-functional or malfunctioning board. Common connectivity errors include:

  • Accidentally swapped nets
  • Missing connections
  • Shorted nets
  • Components connected to the wrong net

A netlist check will flag these issues before the design is sent for manufacturing, allowing them to be corrected. It’s much cheaper and faster to fix errors at this stage rather than after the boards have been made.

Validating design changes

Netlists are also useful for validating design changes. By comparing netlists before and after a design modification, you can quickly see what has changed and verify the modifications are as intended. This is especially important for complex boards where schematics may have been edited by multiple people.

Generating manufacturing data

The netlist is also used to generate the manufacturing files needed to physically produce the PCB. These include the bill of materials (BOM), centroid file (component placement data), and test point report. An incorrect netlist will lead to manufacturing errors, so it’s critical the netlist is thoroughly verified first.

How to generate a PCB netlist

The exact process for generating a netlist will depend on your EDA (electronic design automation) software, but the general steps are:

  1. Complete your schematic design, connecting all components as desired.

  2. Annotate the schematic to assign reference designators (R1, C1, U1, etc.) to each component. This ensures every component has a unique identifier to be referenced in the netlist.

  3. Generate the netlist file. This is usually done through an “Export Netlist” or “Generate Netlist” command in the schematic editor. You may have options to choose the netlist format and what information to include.

  4. Select an appropriate filename and location to save the netlist file. Netlists are plain text files, typically with a .net extension.

Some common netlist formats include:

Format Description
OrCAD Native format for OrCAD Capture
PADS Used by PADS PCB design software
Protel Native format for Altium Designer
Tango Generic netlist format

The choice of format depends on what your PCB layout software accepts and what additional info you need to include. Consult your EDA tool’s documentation for guidance.

Methods for checking a PCB netlist

There are two primary ways to check a PCB netlist: visually and using automated comparison tools.

Visual netlist inspection

For simple designs, it may be feasible to manually review the netlist to verify its accuracy. This involves reading through the netlist file and cross-referencing it with the schematic diagram to confirm each net entry matches the intended connections.

While straightforward, visual inspection is tedious and error-prone for large complex designs. It’s easy to overlook mistakes, especially if there are many similar net names. However, it can still be a useful final cross-check even if automated tools are used.

Automated netlist comparison

The more robust approach is to use EDA software to automatically compare netlists. This involves generating a second netlist from the PCB layout tool and using a netlist comparison feature to check it against the original schematic netlist.

The comparison tool will read both netlists and flag any differences between them. This quickly identifies any nets that are connected differently on the layout vs. the schematic.

Automated comparison is much faster and more reliable than visual inspection, especially for large designs. It will catch subtle errors that are easily missed by a human reader.

To run an automated netlist check:

  1. Create a netlist from your schematic design as described above. This is your “golden” reference netlist.

  2. Complete the PCB layout, connecting components based on the schematic.

  3. Generate a second netlist from the PCB layout tool. The exact process depends on the software but is usually an export function in the layout editor. This produces a netlist reflecting the actual connectivity of the laid out board.

  4. Use the netlist compare feature in your EDA software to check the layout netlist against the schematic netlist. Again, the specific method depends on the tool – consult the documentation.

  5. Review any differences flagged by the comparison tool. Determine if they are acceptable (e.g. intentional changes) or if they indicate an error to be corrected.

  6. If necessary, make corrections in the layout and re-generate the layout netlist. Repeat the comparison until there are no unexpected differences.

Some EDA software can also highlight netlist differences graphically by color-coding nets on the layout and schematic. This provides a quick visual indication of any mismatches.

Interpreting netlist check results

When you run an automated netlist comparison, the software will generate a report listing any differences found between the two netlists. Interpreting this report is key to understanding what issues (if any) need to be addressed.

Here are some common types of differences and what they typically mean:

Difference Interpretation
Extra net in layout A net exists in the layout that is not present in the schematic. This usually indicates an accidental short between nets.
Missing net in layout A net from the schematic is missing in the layout. This means some pins are not connected together as intended.
Pin connected to different net An component pin is connected to a different net in the layout than the schematic. This could be due to swapped nets.
Extra or missing component pins The number of pins on a component is different between the schematic and layout. This may mean the wrong component footprint was used.

Not all differences necessarily indicate a problem. There may be valid reasons for intentional changes between the schematic and layout, such as:

  • Adding or removing test points
  • Intentionally leaving some pins unconnected
  • Splitting or combining power/ground nets for better distribution
  • Rerouting sensitive signals for improved performance

The key is to carefully review each difference and determine if it is expected and acceptable. Any unexpected differences should be investigated and corrected if needed.

It’s good practice to document any intentional differences so there is a record of what changed and why. This helps avoid confusion in the future.

Common netlist errors and how to fix them

Here are some of the most common netlist errors encountered during a PCB design and how to resolve them:

Shorted nets

This occurs when two nets that should be separate are inadvertently connected together, often due to overlapping traces or vias. Shorted nets can cause failed functionality and excessive current draw.

To fix a short:
1. Locate the short by reviewing the layout in the area indicated by the netlist comparison tool.
2. Determine which nets are shorted together based on the netlist report.
3. Reroute the offending traces or vias so there is appropriate clearance between the nets.
4. Regenerate the layout netlist and re-run the comparison to confirm the short is resolved.

Open nets

An open net is when a net is missing a necessary connection, resulting in some pins being left floating. This can cause signal integrity issues and unreliable operation.

To fix an open net:
1. Identify which net has the open based on the netlist check results.
2. Find the unconnected pin(s) in the layout and add traces/vias to properly connect them to the net.
3. Re-check the netlist to verify the open is resolved.

Swapped nets

Swapped nets happen when two nets are mistakenly interchanged in the layout, so pins are connected to the wrong net. This often occurs with buses or other groups of similar nets.

To correct swapped nets:
1. Determine which nets are swapped based on the differences reported by the netlist check.
2. Reroute the swapped trace segments so each pin connects to the proper net as indicated in the schematic.
3. Confirm the fix by generating an updated netlist and comparing again.

Incorrect footprints

If the component footprint used in the layout doesn’t match the symbol in the schematic, it can lead to pin mapping errors in the netlist. This often manifests as extra or missing pins.

To address footprint mismatches:
1. Identify which components have incorrect footprints based on the netlist check report.
2. Update the footprints in the layout to match what is called for in the schematic.
3. Reconnect any nets that changed due to the footprint update.
4. Regenerate the layout netlist and re-run the comparison to validate the changes.

Power/ground issues

Netlists can also help catch issues with power distribution, such as power and ground nets being inadvertently connected or a power net not being properly connected to all the necessary component pins.

To resolve power and ground problems:
1. Check the netlist differences to determine which power/ground nets are affected.
2. Review the layout routing for the identified nets. Look for any accidental shorts or missing connections.
3. Reroute power and ground traces to correct any issues. Pay attention to current capacity and voltage drop.
4. Recheck the netlist to confirm proper connectivity.

In all cases, the netlist check process should be repeated after making any corrections to verify the issue is fully resolved. It’s also a good idea to visually double check the layout changes to catch any issues the automated tools may have missed.


Checking PCB netlists is a critical step in the design process to ensure the physical board connections match the logical schematic design. By comparing netlists from the schematic and layout, discrepancies can be quickly identified and corrected before the design is manufactured.

Both visual inspection and automated comparison methods can be used to verify netlists, but automated checks are much more efficient and reliable, especially for complex designs.

Common netlist errors include shorted nets, open nets, swapped nets, incorrect footprints, and power/ground issues. Each of these can be resolved by carefully reviewing the affected area of the layout and making necessary corrections to the routing or component footprints.

Taking the time to thoroughly review and address any netlist differences will help avoid costly board re-spins and ensure your PCB functions as intended.

Frequently Asked Questions

What is a PCB netlist used for?

A PCB netlist is a text file that captures all electrical connections in a PCB design. It is used to transfer connectivity data between schematic and layout tools, verify the physical layout matches the logical design, and generate manufacturing files like the BOM and assembly drawings.

How do you generate a netlist?

Netlists are typically generated automatically by your EDA software, either from the schematic or layout. The specific process varies by tool, but usually involves an “export netlist” or similar command. Consult your software documentation for step-by-step instructions.

What’s the best way to check a PCB netlist?

The most efficient and reliable method is an automated netlist comparison using your PCB design software. This involves generating netlists from both the schematic and layout, then using a built-in comparison tool to flag any differences between them. Manual visual inspection can also be used but is more tedious and error prone.

What should I do if the netlist check finds errors?

Carefully review each error flagged by the netlist comparison to determine if it is an expected difference or a design error. Any unexpected differences should be investigated and corrected in the layout. Re-run the netlist check after making changes to confirm the errors are resolved.

How often should I check the netlist in a PCB design?

At a minimum, the netlist should be verified before generating manufacturing files to ensure the design is ready for production. However, it’s a good idea to also check the netlist incrementally during layout, especially after making any significant changes. This allows catching errors early when they are easier to correct.